Semiconductor device fabricating method, and semiconductor fabricating device

ABSTRACT

A method for fabricating a semiconductor device includes: supporting a semiconductor substrate formed with a polishing target film by a polishing head; and polishing the polishing target film while restricting movement in a radial direction of the semiconductor substrate by a retainer formed on the polishing head with a tilted surface formed on an inner peripheral section of the retainer, wherein when the polishing target film is polished, an outer peripheral surface of the semiconductor substrate comes into contact with the tilted surface formed on the inner peripheral section of the retainer.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based upon and claims the benefit of priority of theprior Japanese Patent Application No. 2008-205525, filed on Aug. 8,2008, the entire contents of which are incorporated herein by reference.

FIELD

The present invention relates to a semiconductor device fabricatingmethod and a semiconductor fabricating device and, more specifically, toa semiconductor device fabricating method and a semiconductorfabricating device with a film polishing process.

BACKGROUND

There is a technology of polishing a film to be polished formed on asemiconductor substrate by Chemical Mechanical Polishing (CMP).

For example, when forming an interlayer insulator film on asemiconductor substrate formed with a transistor and others, theresulting interlayer insulator film is then formed with a groove byphotolithography, for example. A conductive film is then formed in sucha manner as to embed the groove therewith. The conductive film herein isthe film to be polished (hereinafter, referred to as “polishing targetfilm”. Next, by CMP, the polishing target film is polished until thesurface of the interlayer insulator film is exposed. With such a method,a wiring pattern having the conductive film is formed in the groove.

The problem with such a semiconductor device fabricating method is thatthe polishing target film may have scratches on the surface. When thepolishing target film suffers from scratches on the surface, theresulting semiconductor device may not be reliable.

SUMMARY

According to aspects of the embodiments disclosed herein, a method forfabricating a semiconductor device includes: supporting a semiconductorsubstrate formed with a polishing target film by a polishing head; andpolishing the polishing target film while restricting movement in aradial direction of the semiconductor substrate by a retainer formed onthe polishing head with a tilted surface formed on an inner peripheralsection of the retainer, wherein when the polishing target film ispolished, an outer peripheral section of the semiconductor substratecomes into contact with the tilted surface formed on the innerperipheral section of the retainer.

The object and advantages of the invention will be realized and attainedby means of the elements and combinations particularly pointed out inthe claims.

It is to be understood that both the foregoing general description andthe following detailed description are exemplary and explanatory and arenot restrictive of the invention, as claimed.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a plan view of a semiconductor fabricating device of a firstembodiment;

FIG. 2 is a cross sectional view of the semiconductor fabricating deviceof the first embodiment;

FIGS. 3A and 3B are each an enlargement of a cross sectional view of thesemiconductor fabricating device of the first embodiment;

FIGS. 4A to 4C are diagrams depicting, step by step, a semiconductordevice fabricating method of the first embodiment with cross sectionalviews of the resulting semiconductor device;

FIG. 5 is a schematic cross sectional view of a retainer ring whoseinner peripheral section is been partially worn away due to asemiconductor substrate;

FIG. 6 is a cross sectional view of a semiconductor fabricating deviceof a second embodiment;

FIG. 7 is an enlargement of a cross sectional view of the semiconductorfabricating device of the second embodiment;

FIG. 8 is a cross sectional view of the semiconductor fabricating deviceof a modified example of the second embodiment;

FIG. 9 is an enlargement of a cross sectional view of the semiconductorfabricating device of the modified example of the second embodiment;

FIG. 10 is a cross sectional view of a semiconductor substrate cominginto contact with a retainer ring; and

FIGS. 11A to 11C are each a cross sectional view of the retainer ring ofFIG. 10 whose inner peripheral section has been worn away due to thesemiconductor substrate.

DESCRIPTION OF EMBODIMENTS

FIG. 10 is a cross sectional view of a semiconductor substrate cominginto contact with a retainer ring. A semiconductor substrate 210 formedwith a polishing target film is supported by a polishing head (notillustrated). The polishing head may be provided with a retainer ring212 for restricting the movement of the semiconductor substrate 210 inthe radial direction (in-plane direction). At the time of polishing thepolishing target film, the outer peripheral section of the semiconductorsubstrate 210 may come into contact with an inner peripheral surface 214of the retainer ring 212.

When the outer peripheral section of the semiconductor substrate 210comes into contact with the inner peripheral surface 214 of the retainerring 212, the inner peripheral surface 214 of the retainer ring 212 maybecome partially worn away. Recently, semiconductor substrates havebecome larger in size, which may lead to an increase in friction betweenthe semiconductor substrate and a polishing pad (not illustrated). As aresult, when the outer peripheral section of the semiconductor substrate210 comes into contact with the inner peripheral surface of the retainerring 212, the force applied to the inner peripheral surface of theretainer ring 212 tends to be large. This may cause a deep recess to beformed in the inner peripheral section of the retainer ring 212.

FIGS. 11A to 11C are each a cross sectional view of the retainer ringwhose inner peripheral section has been partially worn away due to thesemiconductor substrate 210.

As illustrated in FIGS. 11A to 11C, due to the wearing away, a deeprecess (groove) 216 may be formed in the inner peripheral section of theretainer ring 212. The portions enclosed by broken lines in FIGS. 11A to11C are portions that may break off easily due to their shape. When theretainer ring 212 is partially worn away in this way, portions of theretainer ring 212 may break off more easily, and the resulting brokenpieces of the retainer ring 212 may cause scratches on the surface ofthe polishing target film.

With the semiconductor device and fabricating method thereof disclosedherein, the inner peripheral section of a retainer may be partiallytilted, and with such a configuration, when a polishing target film ispolished, the outer peripheral section of the semiconductor substratethus comes into contact with the tilted portion of the inner peripheralsection of the retainer. Because the outer peripheral section of thesemiconductor substrate comes into contact with the tilted portion ofthe inner peripheral section of the retainer as such, the force appliedto the inner peripheral section of the retainer may be favorablyreleased so that the recess formed in the inner peripheral section ofthe retainer may be shallower. Also, because a shallower recess isformed in the tilted surface of the retainer, even if the innerperipheral portion of the retainer is partially worn away due to thesemiconductor substrate, portions of the retainer breaking off may bereduced if not prevented. Thus, portions breaking off the retainer arereduced, thereby reducing the possibility of scratch damage on thesurface of the polishing target film.

The inventors have come up with, as a result of extensive study, an ideaof reducing possible scratches as disclosed below.

First Embodiment

A semiconductor device fabricating method and a semiconductorfabricating device of a first embodiment are disclosed by referring toFIGS. 1 to 5.

Semiconductor Fabricating Device

First of all, by referring to FIGS. 1 to 3B, a semiconductor fabricatingdevice (polishing device) with a semiconductor device fabricating methodof this embodiment shall be disclosed. FIG. 1 is a plan view of thesemiconductor fabricating device of the embodiment. FIG. 2 is a crosssectional view of the semiconductor fabricating device of thisembodiment. FIGS. 3A and 3B are each an enlarged cross sectional view ofthe semiconductor fabricating device of the embodiment.

As illustrated in FIG. 1, a polishing table 102 that can rotate isprovided on a base 100.

A polishing pad 104 is provided on the polishing table 102. Thepolishing pad 104 may be formed by laminating a plurality ofpolyurethane foam layers, for example.

The base 100 is provided with an arm 106.

The arm 106 may be provided with a polishing head 108 that can rotate.By moving the arm 106 as desired, the polishing head 108 may also bemoved as desired.

The polishing head 108 supports a semiconductor substrate 10 formed witha polishing target film 36 (refer to FIG. 4B). While rotating thesemiconductor substrate 10, the polishing head 108 pushes the polishingtarget film 36 formed on the semiconductor substrate 10 against thepolishing pad 104.

The lower surface side of the polishing head 108 is provided with aretainer 116. The retainer 116 serves to restrict the movement of thesemiconductor substrate 10 in the radial direction (in-plane direction).In this embodiment, the retainer 116 is in the shape of a ring (theshape of a cylinder). The ring-shaped retainer 116 is hereinafterreferred to as a “retainer ring” (guide ring). The retainer ring 116 maybe made of resin. For example the retainer ring 116 may be PolyPhenylene Sulfide Resin (PPS), Vespel™, and the like. The retainer ring116 is so designed as to have an inner diameter slightly larger than theouter diameter of the semiconductor substrate 10. The retainer ring 116may have an inner diameter of 301 mm, an outer diameter of 348 mm, and aheight of 20 mm, for example.

The lower surface side of the polishing head 108 may be also providedwith a pressurization technique (air chamber) 118. The air chamber 118may be provided inside the retainer ring 116. The lower surface side ofthe air chamber 118 may be provided with an elastic film (membrane) 120.The membrane 120 may be an elastic material including rubber, forexample. The membrane 120 may be provided for applying a constant forceto the semiconductor substrate 10. The lower surface side of themembrane 120 is attached to the semiconductor substrate 10 formed withthe polishing target film 36. With such a configuration, thesemiconductor substrate 10 is supported by the polishing head 108. Whensupporting the semiconductor substrate 10 by the polishing head 108, thepolishing target film 36 formed on the semiconductor substrate 10 (referto FIG. 4B) is positioned as to be on the lower side of thesemiconductor substrate 10. The normal of the main surface of thesemiconductor substrate 10 has the same direction as the normal of thelower surface of the polishing head 108.

When air is directed into the air chamber 118, the air chamber 118expands, the membrane 120 moves downward, and the semiconductorsubstrate 10 is pushed against the polishing pad 104. By controlling asappropriate the amount of air guided into the air chamber 118, thepressure to push the semiconductor substrate 10 against the polishingpad 104 may also be controlled as appropriate.

The lower portion of the inner peripheral section of the retainer ring116 is formed with a tilted surface 122. In this embodiment, when theouter peripheral surface of the semiconductor substrate 10 comes intocontact with the inner peripheral surface of the retainer ring 116, theouter peripheral surface of the semiconductor substrate 10 may be sodisposed as to come into contact with the tilted surface 122 formed inthe retainer ring 116. For example, if the semiconductor substrate 10has a thickness of 775 μm, then, the height h of the tilted surface 122may be 380 μm or more to allow the outer peripheral surface of thesemiconductor substrate 10 come into contact with the tilted surface 122of the retainer ring 116 when the outer peripheral surface of thesemiconductor substrate 10 comes into contact with the inner peripheralsection of the retainer ring 116.

FIG. 3A is a schematic diagram illustrating a tilt angle θ of the tiltedsurface 122 formed on the inner peripheral section of the retainer ring116. FIG. 3B is a schematic diagram illustrating the state in which theinner peripheral section of the retainer ring 116 is in contact with theouter peripheral surface of the semiconductor substrate 10.

If the tilted surface 122 is set with the tilt angle θ relatively largewith respect to the normal direction of the lower surface of thepolishing head 108 (refer to FIG. 3A), when the outer peripheral surfaceof the semiconductor substrate 10 comes into contact with the innerperipheral section of the retainer ring 116, the force applied to theretainer ring 116 may be released. By setting the tilted surface 122with a relatively large tilt angle θ with respect to the normaldirection of the lower surface of the polishing head 108, deep wearingaway of the inner peripheral section of the retainer ring 116 may bereduced if not prevented. As such, the tilt angle θ of the tiltedsurface 122 formed on the inner peripheral section of the retainer ring116 is preferably set at a relatively large angle. However, if the tiltangle θ of the tilted surface 122 is too large with respect to thenormal direction of the lower surface of the polishing head 108, theretainer ring 116 may not be able to restrict the semiconductorsubstrate 10 from moving in the radial direction. If this is the case,the semiconductor substrate 10 may come off from the polishing head 108.In consideration thereof, the tilt angle θ of the tilted surface 122 ispreferably not excessively large with respect to the normal direction ofthe main surface of the semiconductor substrate 10. The preferable rangeof the tilt angle θ of the tilted surface 122 formed on the innerperipheral section of the retainer ring 116 is 10 to 40 degrees, forexample, with respect to the normal direction of the lower surface ofthe polishing head 108. With the tilt angle θ of the tilted surface 122being 10 degrees or more, the force applied to the retainer ring 116 maybe sufficiently released so that the recess will not be too deep in theinner peripheral section of the retainer ring 116. Moreover, with thetilt angle θ of the tilted surface 122 being 40 degrees or less, thesemiconductor substrate 10 may be restricted, with reliability, frommoving in the radial direction.

A more preferable range for the tilt angle θ of the tilted surface 122formed on the inner peripheral section of the retainer ring 116 is 15 to35 degrees, for example, with respect to the normal direction of thelower surface of the polishing head 108. With the tilt angle θ of thetilted surface 122 being 15 degrees or more, the force to be applied tothe retainer ring 116 may be fully released so that the recess may notbe too deep in the inner peripheral section of the retainer ring 116.Moreover, with the tilt angle θ of the tilted surface 122 being 35degrees or less, the semiconductor substrate 10 may be restricted frommoving in the radial direction with a high reliability.

Disclosed herein is an example where the tilted surface 122 formed onthe inner peripheral section of the retainer ring 116 has the tilt angleθ of 10 to 40 degrees, and more preferably 15 to 35 degrees with respectto the normal direction of the lower surface of the polishing head 108,but the tilt angle θ of the tilted surface 122 is not restricted to sucha size range. Alternatively, the tilt angle θ of the tilted surface 122may be set, as appropriate, to fall in the range of 1 to 70 degrees withrespect to the normal direction of the lower surface of the polishinghead 108. However, in view of the above, the tilted surface 122 formedon the inner peripheral section of the retainer ring 116 preferably hasthe tilt angle θ of 10 to 40 degrees, and more preferably 15 to 35degrees with respect to the normal direction of the lower surface of thepolishing head 108.

The polishing table 102 includes a nozzle 110 formed thereon. The nozzle110 is provided for supplying a slurry (abrasive), pure water, and thelike onto the polishing pad 104.

The polishing table 102 is provided with, on the side section thereof, adresser 112 for dressing the polishing pad 104.

The dresser 112 may be provided with a diamond disk 114. The diamonddisk 114 may include diamond particles of about 150 μm in size fixed toa base made of stainless steel, for example.

As such, the semiconductor fabricating device of the embodiment isconfigured.

Semiconductor Device Fabricating Method

Next, a semiconductor device fabricating method of the embodiment shallbe disclosed by referring to FIGS. 1 to 5. FIGS. 4A to 4C are diagramsillustrating, step by step, a semiconductor device fabricating method ofthis embodiment with cross sectional views of the resultingsemiconductor device. FIG. 5 is a schematic cross-sectional view of theretainer ring whose inner peripheral section is partially worn away dueto the semiconductor substrate.

First of all, as illustrated in FIG. 4A, an interlayer insulator film 34is formed on the semiconductor substrate 10 formed with a transistor(not illustrated) and the like. A silicon wafer with a diameter of 300mm, for example, may be used for the semiconductor substrate 10. Thesemiconductor substrate 10 may have a thickness of about 775 μm, forexample.

Next, a photo resist film (not illustrated) is formed over thesemiconductor substrate 10 by spin coating.

Next, the photo resist film is subjected to patterning byphotolithography.

Next, the interlayer insulator film 34 is subjected to etching using thephoto resist film as a mask. As such, a groove 38 is formed forembedding therein a wiring pattern 40 (refer to FIG. 4C), or a contacthole (not illustrated) for embedding therein a conductor plug (notillustrated).

Next, a barrier metal film (not illustrated) may be formed over theresulting surface by sputtering, for example. The barrier metal film maybe, for example, a laminated film including a tantalum (Ta) film and atitanium nitride (TiN) film. The Ta may have a thickness of 10 nm, andthe TiN film may have a thickness of 5 nm, for example.

Next, a seed film (not illustrated) is formed over the resulting surfaceby sputtering, for example. The seed film may be, for example, a Cufilm. The Cu film may have a thickness of 60 nm, for example.

Next, a conductive film may be formed by electroplating, for example.The conductive film may be a Cu film. The Cu film may have a thicknessof 1 μm, for example.

As such, the resulting polishing target film 36 includes the barriermetal film and the conductive film (refer to FIG. 4B).

Next, the semiconductor substrate 10 formed with the polishing targetfilm 36 is supported by the polishing head 108. For supporting thesemiconductor substrate 10 by the polishing head 108, the polishingtarget film 36 formed on the semiconductor substrate 10 (refer to FIG.4B) is so disposed as to be on the lower side of the semiconductorsubstrate 10.

Next, by CMP, the polishing target film 36 is polished until the surfaceof the interlayer insulator film 34 is exposed (refer to FIG. 4C). Forpolishing the polishing target film 36, while the polishing table 102and the polishing head 108 are each rotated, the polishing target film36 formed on the semiconductor substrate 10 is pushed against thepolishing pad 104. When the polishing target film 36 is polished assuch, a slurry is provided onto the polishing pad 104 via the nozzle 110(refer to FIG. 1). The polishing target film 36 is pushed against thepolishing pad 104 with a pressure of about 2.8 psi, for example, and theretainer ring 116 is pushed against the polishing pad 104 with apressure of about 5.5 psi, for example. The polishing head 108 may berotated at a rotation frequency of 80 rotations per minute, and thepolishing table 102 may be rotated at a rotation frequency of 76rotations per minute, for example. The slurry for provision onto thepolishing pad 104 may include an abrasive, a pH regulator, a dispersant,an oxidizer, and the like. The abrasive in the slurry may be a colloidalsilica with a primary particle size of 70 nm, for example. The abrasivein the slurry may have a concentration of 1 wt % or lower, for example.The amount of supply of the slurry may be 300 ml/min, for example. Notehere that such requirements for polishing the polishing target film 36are not restricted to those disclosed above, and may be set asappropriate.

When the semiconductor substrate 10 is restricted from moving in theradial direction by the retainer ring 116, the outer peripheral surfaceof the semiconductor substrate 10 comes into contact with the tiltedsurface 122 formed on the inner peripheral section of the retainer ring116. Because the outer peripheral surface of the semiconductor substrate10 comes into contact with the tilted surface 122 formed on the innerperipheral section of the retainer ring 116 as such, the force to beapplied to the inner peripheral section of the retainer ring 116 may bereleased to some degree. In this embodiment, because the force to beapplied to the inner peripheral section of the retainer ring 116 may bereleased to some degree as such, a recess (groove) 124 to be formed tothe inner peripheral section of the retainer ring 116 may be shallower,as illustrated in FIG. 5. Moreover, because the recess 124 is formed inthe tilted surface 122 formed in the retainer ring 116, even if therecess 124 is formed, the shape of the resulting retainer ring 116 willnot break easily. As such, the polishing target film 36 may be polisheduntil the surface of the interlayer insulator film 34 is exposed so thatthe wiring pattern 40 with the conductive film is embedded into thegroove 38 (refer to FIG. 4C).

As such, according to the first embodiment, the inner peripheral sectionof the retainer ring 116 is formed with the tilted surface 122, and whenthe polishing target film 36 is polished, the outer peripheral surfaceof the semiconductor substrate 10 comes into contact with the tiltedsurface 122 formed on the inner peripheral section of the retainer ring116. In this embodiment, because the outer peripheral surface of thesemiconductor substrate 10 comes into contact with the tilted surface122 formed on the inner peripheral section of the retainer ring 116 assuch, the force to be applied to the inner peripheral section of theretainer ring 1116 may be released to some degree. As such, in thisembodiment, the depth of the recess 124 may be reduced in the innerperipheral section of the retainer ring 116. Moreover, in thisembodiment, because the recess 124 is formed in the tilted surface 122formed on the retainer ring 116, even if the inner peripheral section ofthe retainer ring 116 is partially worn away, portions of the retainerring 116 may not break off as easily as before due to the resultingshape. As such, in this embodiment, breaking off of the retainer ring116 is accordingly reduced, thereby reducing the possibility of scratchdamage on the surface of the polishing target film 36.

Second Embodiment

By referring to FIGS. 6 and 7, a semiconductor device fabricating methodand a semiconductor fabricating device of a second embodiment aredisclosed. FIG. 6 is a cross sectional view of the semiconductorfabricating device of the second embodiment, and FIG. 7 is anenlargement of a cross sectional view of the semiconductor fabricatingdevice of the second embodiment. Any components similar to those in thesemiconductor device fabricating method and the semiconductorfabricating device in the first embodiment of FIGS. 1 to 5 are providedwith the same reference numeral, and therefore are only partiallydescribed or their description is omitted.

With the semiconductor device fabricating method and the semiconductorfabricating device of the second embodiment, the main characteristicslie in a member 126 provided on the inside of a retainer ring 116 a witha hardness higher than the hardness of the semiconductor substrate 10.

Semiconductor Fabricating Device

First of all, the semiconductor fabricating device of this embodiment isdisclosed by referring to FIG. 6.

As illustrated in FIG. 6, the retainer ring 116 a is formed with, on theinner peripheral section thereof, a recess (mating portion) 128. Themating portion 128 may have a depth of about 5 mm, for example. Themating portion may have a height of 3 mm or more, and more preferably, 5mm or more, for example. The mating portion 128, preferably, does notexceed the height of the inner peripheral section of the retainer ring116 a.

A high-hardness member 126 having a hardness higher than thesemiconductor substrate 10 is fitted into the mating portion 128. Thehigh-hardness member 126 is formed in the shape of a ring (the shape ofa cylinder). The high-hardness material 126 may be made of a materialincluding titanium, for example. For example, the high-hardness material126 may be made of a titanium alloy.

As illustrated in FIG. 6, when the polishing target film 36 (refer toFIG. 4B) is polished, the outer peripheral surface of the semiconductorsubstrate 10 comes into contact with the high-hardness member 126.Because the high-hardness member 126 has the hardness higher than thesemiconductor substrate 10, portions of the hard-hardness member 126 maynot be deeply worn away due to the semiconductor substrate 10. Becauseportions of the hard-hardness member 126 are not worn away due tocontact with the semiconductor substrate 10 as such, the resultingretainer ring 116 a may not be partially worn away due to thesemiconductor substrate 10. Accordingly, also in this embodiment,breaking off of portions of the retainer ring 116 a is accordinglyreduced, thereby reducing the possibility of scratch damage on thesurface of the polishing target film 36.

Semiconductor Device Fabricating Method

Next, the semiconductor device fabricating method in this embodiment isdisclosed by referring to FIGS. 1, 4A to 4C, 6, and 7.

First of all, the processes in this embodiment are similar to those inthe semiconductor device fabricating method in the first embodimentdisclosed by referring to FIGS. 4A and 4B from the process of formingthe interlayer insulator film 34 on the semiconductor substrate 10formed with a transistor (not illustrated) and the like, to the processof forming the polishing target film 36 on the semiconductor substrate10, and thus are not described again.

Next, the semiconductor substrate 10 formed with the polishing targetfilm 36 is supported by the polishing head 108. When the semiconductorsubstrate 10 is supported by the polishing head 108 as such, thepolishing target film 36 formed on the semiconductor substrate 10 (referto FIG. 4B) is disposed to be on the lower side of the semiconductorsubstrate 10.

Next, by CMP, the polishing target film 36 is polished until the surfaceof the interlayer insulator film 34 is exposed (refer to FIG. 4C). Forpolishing the polishing target film 36, while the polishing table 102and the polishing head 108 are each being rotated, the polishing targetfilm 36 formed on the semiconductor substrate 10 is pushed against thepolishing pad 104. When the polishing target film 36 is polished assuch, a slurry is provided onto the polishing pad 104 via the nozzle 110(refer to FIG. 1). The polishing target film 36 is pushed against thepolishing head 104 with the pressure of about 2.8 psi, for example, andthe retainer ring 116 a is pushed against the polishing pad 104 with thepressure of about 5.5 psi, for example. The polishing head 108 may berotated at the rotation frequency of 80 rotations per minute, and thepolishing table 102 may be rotated at the rotation frequency of 76rotations per minute, for example. The slurry for provision onto thepolishing pad 104 may include an abrasive, a pH regulator, a dispersant,an oxidizer, and the like. The abrasive in the slurry may be colloidalsilica with a primary particle size of 70 nm, for example. The abrasivein the slurry may have a concentration of 1 wt % or lower, for example.The amount of supply of the slurry may be 300 ml/min, for example. Notehere that such requirements for polishing of the polishing target film36 are not restricted to those described above, and may be set asappropriate.

When the semiconductor substrate 10 is restricted from moving in theradial direction by the retainer ring 116 a, the outer peripheralsurface of the semiconductor substrate 10 comes into contact with theinner peripheral section of the high-hardness member 126 having ahardness higher than the semiconductor substrate 10. As such, thepolishing target film 36 is polished until the surface of the interlayerinsulator film 34 is exposed so that the wiring pattern 40 with theconductive film is embedded into the groove 38 (refer to FIG. 4C).

As such, according to the second embodiment, the inner peripheralsection of the retainer ring 116 a is formed with the high-hardnessmember 126, and when the polishing target film 36 is polished, the innerperipheral section of the high-hardness member 126 provided on the innerperipheral section of the retainer ring 116 a as such is in contact withthe outer peripheral surface of the semiconductor substrate 10.Accordingly, also in this embodiment, the retainer ring 116 a may not bepartially worn away due to the semiconductor substrate 10 so thatbreaking off of portions of the resulting retainer ring 116 a may bereduced. As such, also in this embodiment, the possibility of scratchdamage on the surface of the polishing target film 36 may be favorablyreduced.

Modified Example

A semiconductor device fabricating method and a semiconductorfabricating device in a modified example of the second embodiment isdisclosed next by referring to FIGS. 8 and 9. FIG. 8 is a crosssectional view of the semiconductor fabricating device in this modifiedexample. FIG. 9 is an enlargement of a cross sectional view of thesemiconductor fabricating device in this modified example.

With the semiconductor device fabricating method and the semiconductorfabricating device in this modified example, the main characteristicslie in a high-hardness film (high-hardness member) 126 a disposed atleast on the inner peripheral section of the retainer ring 116 with ahardness that is higher than the semiconductor substrate 10.

As illustrated in FIG. 8, at least on the inner peripheral section ofthe retainer ring 116, the high-hardness film (high-hardness member) 126a is formed with the hardness that is higher than the semiconductorsubstrate 10. In this example, the high-hardness film 126 a is formed onsurfaces of the retainer ring 116, i.e., the inner peripheral surface,the bottom surface, and the outer peripheral surface, for example. Thehigh-hardness film 126 a is made of, as appropriate, a material havingthe hardness higher than the semiconductor substrate 10. In thisexample, the high-hardness material 126 a may be made of a materialincluding titanium, for example. The high-hardness material 126 a may beformed by Physical Vapor Deposition (PVD), for example.

When the retainer ring 116 serves to restrict the semiconductorsubstrate 10 from moving in the radial direction, the outer peripheralsurface of the semiconductor substrate 10 comes into contact with thehigh-hardness film (high-hardness member) 126 a having the hardnesshigher than the semiconductor substrate 10.

As such, in this example, the high-hardness member 126 a is disposed atleast on the inner peripheral section of the retainer ring 116, and whenthe polishing target film 36 is polished, the high-hardness member 126 adisposed on the inner peripheral section of the retainer ring 116 assuch is in contact with the outer peripheral surface of thesemiconductor substrate 10. Also in this modified example, partialwearing away of the retainer ring 116 due to the semiconductor substrate10 is reduced so that breaking off of portions of the resulting retainerring 116 may be reduced. As such, also in this embodiment, thepossibility of scratch damage on the surface of the polishing targetfilm 36 may be favorably reduced.

Modified Embodiment

The embodiments disclosed above are not restrictive, and other variousmodifications are also possible.

In the embodiments disclosed above, the polishing target film 36 isdescribed in the examples as a conductive film, but the polishing targetfilm 36 is not restricted as such. For example, the polishing targetfilm 36 may be insulative.

In the second embodiment, the high-hardness members 126 and 126 a areeach described as being made of a material including titanium, but thehigh-hardness members 126 and 126 a are both not restricted as such. Forexample, any other material having the hardness higher than thesemiconductor substrate 10 can be used for making the high-hardnessmembers 126 and 126 a.

All examples and conditional language recited herein are intended forpedagogical purposes to aid the reader in understanding the principlesof the invention and the concepts contributed by the inventor tofurthering the art, and are to be construed as being without limitationto such specifically recited examples and conditions, nor does theorganization of such examples in the specification relate to a showingof the superiority and inferiority of the invention. Although theembodiments have been described in detail, it should be understood thatthe various changes, substitutions, and alterations could be made heretowithout departing from the spirit and scope of the invention.

1. A method for fabricating a semiconductor device, comprising:supporting a semiconductor substrate formed with a polishing target filmby a polishing head; and polishing the polishing target film whilerestricting movement in the radial direction of the semiconductorsubstrate by a retainer formed on the polishing head with a tiltedsurface formed on an inner peripheral section of the retainer, whereinwhen the polishing target film is polished, an outer peripheral surfaceof the semiconductor substrate comes into contact with the tiltedsurface formed on the inner peripheral section of the retainer.
 2. Themethod according to claim 1, wherein the tilted surface has a tilt angleof 10 to 40 degrees with respect to the normal direction of the lowersurface of the polishing head.
 3. The method according to claim 2,wherein the tilted surface has the tilt angle of 15 to 35 degrees withrespect to the normal direction of the lower surface of the polishinghead.
 4. A semiconductor device, comprising: a polishing head thatsupports a semiconductor substrate formed with a polishing target film;and a retainer, that is provided on the polishing head, with a tiltedsurface on an inner peripheral section to restrict movement of thesemiconductor substrate in the radial direction, wherein when thepolishing target film is polished, an outer peripheral surface of thesemiconductor substrate comes into contact with the tilted surfaceformed on the inner peripheral section of the retainer.
 5. Thesemiconductor device according to claim 4, wherein the tilted surfacehas a tilt angle of 10 to 40 degrees with respect to the normaldirection of the lower surface of the polishing head.
 6. Thesemiconductor device according to claim 5, wherein the tilted surfacehas the tilt angle of 15 to 35 degrees with respect to the normaldirection of the lower surface of the polishing head.
 7. A semiconductordevice, comprising: a polishing head that supports a semiconductorsubstrate formed with a polishing target film; and a retainer that isprovided on the polishing head with a member, having a hardness higherthan the semiconductor substrate, on an inner peripheral section torestrict movement of the semiconductor substrate in the radialdirection, wherein when the polishing target film is polished, an outerperipheral surface of the semiconductor substrate comes into contactwith the member formed on the inner peripheral section of the retainer.8. The semiconductor device according to claim 7, wherein the memberhaving the hardness higher than the semiconductor substrate includestitanium.